Tissu 50% COTON 50% POLYESTER COREYARNS, chaine & trame retors, armure toile 1/1 CPT ou RIPSTOP CPRS, 320g/m2, 143cm
Principales utilisations support pour toiles de tentes m ilitaires apres traitem ent 3i SH
Principales utilisations:support pour toiles de tentes m ilitaires apres traitem ent 3i SH
Écran 6,71''
Réseau 4G+
Double Sim
Android 12
Processeur MediaTek Helio G85 - 12 nm
Mémoire Interne de 64 Go
Mémoire RAM de 3 Go
Appareil Photo Principal de 50 + 0,08 Mpx
Appareil Photo Secondaire de 5 Mpx
Wifi / Bluetooth / GPS / Empreinte digitale / Radio FM
Batterie de 5 000 mAh
Ref:XR12C-3/64_GRY
Concept:Tactile
Telephone intelligent:Oui
Modele:Xiaomi Redmi 12C
Couleur:Gris
Dimensions (lxlxh) en mm:168,76 x 76,41 x 8,77 mm
Poids net en g:192 g
Type de carte SIM:Nano SIM
Transfert de donnees:2G/3G/4G
Acces au(x) reseau(x):Quadbandes 850/900/1800/1900
Resolution decran:720 x 1650 pixels
Tissu 100% COTON, arm ure toile 1/1, 230g/m2, 175 & 205cm, traite im perimpu (Schm erber 250mm)
Principales utilisations:chambres interieurs de tentes de camping
The GS2971A is a multirate SDI integrated Receiver which includes complete SMPTE processing, as per SMPTE 425M, 292M and SMPTE 259MC. The SMPTE processing features can be bypassed to support signals with other coding schemes.
The GS2971A integrates Gennum's adaptive cable equalizer technology, achieving unprecedented cable lengths and jitter tolerance. It features DC restoration to compensate for the DC content of SMPTE pathological signals.
The device features an Integrated Reclocker with an internal VCO and a wide Input Jitter Tolerance (IJT) of 0.7UI.
A serial digital loopthrough output is provided, which can be configured to output either reclocked or nonreclocked serial digital data. The serial digital output can be connected to an external cable driver.
The device operates in one of four basic modes SMPTE mode, DVBASI mode, DataThrough mode or Standby mode.
The EP103T LVDS transmitter supports transmission between the host and the flat panel display up to SXGA+ resolutions. The transmitter converts 25 bits (8bits/color, 2 dummy bits) of Low Voltage TTL data and 3 control bits into 4 LVDS (Low Voltage Differential Signal) data streams. At a maximum input clock rate of 135MHz, each LVDS differential data pair speed is 945Mbps, providing a total throughput of 3.78Gbps. The transmitter can be configured to input clock rising edge or falling edge strobe through an external pin. Support 10MHz to 135MHz clock rates for
HVGA to SXGA+ resolution
Up to 3.78Gbps bandwidth
PLL requires no external components
Cycletocycle jitter rejection
3.3V to 1.8V Low Voltage TTL tolerant Input
Programmable data and control strobe select
Power down mode supported